1. Field of the Invention
The present invention relates to integrated circuits, and more specifically to a structure and method for designing the wiring layout or routing paths in a programmable logic integrated circuit device for maximizing the number of programmable connections for an available diffusion area or minimizing the diffusion area for a given number of connections.
2. Description of the Prior Art
Field programmable gate arrays (FPGAs) typically have at least two distinct programmable features. One such feature is the logic block, which typically may be programmed to assume a variety of logic functions such as some or all Boolean logic functions for a given number of inputs. The other such feature is the interconnection of such logic blocks via paths that interconnect the outputs and inputs of several logic blocks in a selected sequence to achieve a desired result. Numerous programmable routing structures have been designed to achieve various levels of choice in routing signal paths through a programmable device. U.S. Reissue Pat. No. Re. 34,363, which is incorporated herein by reference and title to which is held by the assignee hereof, discloses a programmable routing structure in the first FPGA.
Such prior art programmable routing structures typically consist of wires programmably connectable by a dispersed number of switching devices such as field effect transistors, the selected conditions of which (i.e., open or closed) determine the chosen path for a signal communicated between programmed logic blocks through such routing structures. Such dispersal of switching devices usually requires numerous diffusion areas within the integrated circuit device, which use a large amount of silicon surface area. To minimize cost, surface area must be used efficiently, particularly where a relatively large number of signal paths must be provided within a relatively small surface area. Therefore, there is a need to use a shared diffusion area which maximizes the number of paths for the diffusion area or, alternatively, minimizes the diffusion area for a given number of paths.